发明名称
摘要 <p>PURPOSE:To shorten the measuring time of dynamic ROM data holding decided by a lowest operation security frequency without using a large scaled test circuit in a dynamic ROM making a vertically laminated Nch transistor a ROM cell. CONSTITUTION:By making a test mode switching signal T a high level, all gates of ROM cells 8-15 are fixed to the high level, and a ROM discharge signal DR is a low level, and switches an address signal A3. Then, after a ROM data hold capacity 29 is charged by a Pch transistor 28, the Pch transistor 28 is turned off, and the high level of hold capacity potential Vc1 is read out. Then, the ROM discharge signal DR is made the high level, and the Nch transistors 24, 25 are turned on, and the charge in the hold capacity 29 is discharged, and the low level of the hold capacity potential Vc1 is read out.</p>
申请公布号 JP2616678(B2) 申请公布日期 1997.06.04
申请号 JP19930326664 申请日期 1993.12.24
申请人 发明人
分类号 G11C29/00;G11C17/00;G11C29/04;(IPC1-7):G11C29/00 主分类号 G11C29/00
代理机构 代理人
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