发明名称 STRUCTURE AND MANUFACTURING METHOD OF PILLAR TYPE TRANSISTOR
摘要 The device is characterized by the features that the surroundings of a transistor pillar(6) are etched, and a base region is located in the middle of an N first heavily doped impurity layer(7) and an N second heavily doped impurity layer(20), and a base electrode is buried in a silicon substrate. The method is for reducing the parasitic junction capacitance of the base electrode and having the bidirectional operation characteristics of the transistor.
申请公布号 KR970009033(B1) 申请公布日期 1997.06.03
申请号 KR19930027023 申请日期 1993.12.09
申请人 KOREA ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 LEE, KYU-HONG;PARK, SE-HOON;KIM, DAE-YONG;LEE, JIN-HYO
分类号 H01L27/082;(IPC1-7):H01L27/082 主分类号 H01L27/082
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