发明名称 PRINTER CLOCK CONTROLLER
摘要 PROBLEM TO BE SOLVED: To obtain a printer clock controller in which the driving operation of CPU and the refresh operation of RAM are performed surely with high power saving effect through very simple circuitry. SOLUTION: A RAM access switching circuit 110 is controlled to deliver first and second refresh timing signals to a DRAM 60 based on the detection of first and second comparison circuits 102, 103 when first and second oscillation circuits 100, 101 are stopped and a printer body is turned on. A clock switching circuit 107 is also controlled to input a first clock to a CPU-P51 and a control function module 200 controls the reset output of CPU such that the provision of a reset signal is released based on the detection of the second comparison circuit 103.
申请公布号 JPH09141974(A) 申请公布日期 1997.06.03
申请号 JP19950299529 申请日期 1995.11.17
申请人 CANON INC 发明人 SUZUKI NAOHISA
分类号 B41J29/38;G03G21/00;G03G21/14;H04N1/21 主分类号 B41J29/38
代理机构 代理人
主权项
地址