发明名称 POWER SEMICONDUCTOR AND ITS MANUFACTURING METHOD
摘要 N+ impurity ions are implanted into a P-type substrate 1 to form an N+ buried layer 2 and an N-epitaxial layer 3 is formed through N+ epitaxial growth. P+ isolation layers 4 are formed by P+ impurity implantation, an N+ deep collector is formed between the P+ isolation layers, and a P-base 6 of an npn bipolar transistor is formed on the junction boundary of the npn bipolar transistor and PMOS transistor. An oxide layer and polysilicon layer are formed on the overall surface of the substrate, and a P+ drain electrode 9B is formed on the diffusion region of the P-base. Simultaneously, a P+ impurity diffusion region 10 is formed, and then an N+ emitter electrode 11 is formed according to impurity ion implantation. An N+ source electrode 9A' is formed, an insulating layer 12 is formed on the overall surface of the substrate, and metal is deposited thereon and patterned.
申请公布号 KR970009032(B1) 申请公布日期 1997.06.03
申请号 KR19930026659 申请日期 1993.12.07
申请人 HYUNDAI ELECTRONICS IND. CO. 发明人 PARK, HOON-SOO
分类号 H01L27/06;(IPC1-7):H01L27/06 主分类号 H01L27/06
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