SIDE TRENCH ISOLATION METHOD USING A TWO-COMPONENT PROTECTIVE LAYER OF POLYSILICON ON SILICON NITRIDE FOR INSULATOR LAYER PLANARISATION BY CHEMICAL-MECHANICAL POLISHING

摘要

A method for isolating the working areas of a semiconductor substrate using side trenches, wherein (a) a two-component protective layer (3) consisting of silicon nitride and polysilicon is deposited on the semiconductor substrate, (b) trenches (7) are provided in the semiconductor substrate (1) alongside predetermined areas (6) of the substrate (1) that are covered with the protective layer (3) and intended to form the working areas at a later stage, (c) a layer of insulating material (8) is deposited in the trenches (7) and on the predetermined areas (6) of the substrate (1), and (d) the semiconductor block is planarised in a single step by chemical-mechanical polishing in such a way that the polysilicon of the upper layer (3b) has a higher etching rate during chemical-mechanical polishing than the insulating material, while the nitride of the lower layer (3a) has good resistance to chemical-mechanical etching. In one embodiment, the chemical-mechanical polishing of step (d) is combined with end-of-etching detection on the two-component protective layer (3).