A CLOCKED HIGH VOLTAGE SWITCH

摘要

The present invention discloses methods and apparatus for implementing a clocked high voltage switch involving MOS devices (M1-M19). The switching is from a high voltage source typically at 21V to ground. An intermediate voltage source typically at 11V is introduced for reducing the gated breakdown voltage requirement to approximately 10V. This reduced gated breakdown voltage requirement is easily met by special layout methods applied to various transistors in the circuit (M1-M3, M5-M6, M8-M13). The basic layout methods include the terminating of the field implant region near the N+P junction to expose the N+ diffusion over the P substrate to increase the junction breakdown and the gated diode breakdown, and the use of short channel length to reduce the threshold voltage.