发明名称 Method for executing branch instructions by processing loop end conditions in a second processor
摘要 A method and system for executing branch or other instructions in a loop. A loop end condition is evaluated in a fixed point unit while floating point instructions are evaluated in a floating point unit. In a first execution of the instructions in the loop, the loop end condition is processed as in prior art. A branch target instruction is stored in a branch target register and an instruction address of the branch target instruction is stored in a branch address register. However, on subsequent execution of the instructions in the loop, the branch condition is evaluated and, if it is fulfilled, once the end of the loop is detected by comparison of the effective address of the next instruction to be executed with the contents of the branch address register, the effective address of the first instruction in the loop is passed from the branch target register to an operations register.
申请公布号 US5634047(A) 申请公布日期 1997.05.27
申请号 US19960699074 申请日期 1996.06.10
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GETZLAFF, KLAUS J.;WILLE, UDO;ROETHE, BRIGITTE;HALLER, WILHELM;TAST, HANS-WERNER
分类号 G06F9/32;G06F9/38;(IPC1-7):G06F9/30 主分类号 G06F9/32
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