发明名称 Three phase clocking for an IC shift register at the end of a long serial data path
摘要 Within an integrated circuit a source of digital data is coupled to a distant destination by a serial data path that is characterized by being either an imperfect and lossy transmission line or as possessing significant high frequency attenuation. A single phase clock accompanies the data over the serial data path. A single phase to three phase clock generator at the destination creates the three phase clock. If the destination is a shift register, then the three phase clock can be used for stage-to-stage clocking within the shift register, as well as for getting data into the input bit of the shift register.
申请公布号 US5633905(A) 申请公布日期 1997.05.27
申请号 US19960667156 申请日期 1996.06.20
申请人 HEWLETT-PACKARD COMPANY 发明人 BROWN, RICHARD R.
分类号 G11C5/06;G11C19/00;(IPC1-7):G11C19/00 主分类号 G11C5/06
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