| 摘要 |
Fast fall times for ECL logic waveforms are produced by use of a charge pump, which very quickly transfers charge from the ECL output load capacitance (7) into a temporary holding capacitor (CREG). The charge transferred onto the temporary holding capacitor (CREG) may then be removed at a leisurely pace. The charge pump includes a pulldown transistor (Q8), and a control circuit that selectively turns the pulldown transistor on, if the ECL ouptut will be low, or off, if the ECL output will be high. The control circuit includes an emitter-follower transistor (Q9) which follows the differential ECL collector node that changes voltage inversely to the desired final ECL output. A diode (D10) is connected to the emitter-follower transistor's emitter so that the diode output is two diode drops below the inverse ECL collector node. The diode (D10) drives the base of the pulldown transistor, so that the base of the pulldown transistor remains static until the inputs to the circuit change.
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