| 摘要 |
A power off-loading circuit (10) includes an IC device (11) and a discrete resistor (21), which provide a regulated voltage at an output pin (19) of the IC device (11). The IC device (11) includes a first FET (12), a second FET (14), and an operational amplifier (16). For a low voltage at an input pin (13) of the IC device (11), the first FET (12) conducts a current to a load (25) connected to the output pin (19). For a high voltage at the input pin (13), a large portion of the current is directed through the discrete resistor (21) and the second FET (14). A large portion of power is off-loaded from the IC device (11) and dissipated in the discrete resistor (21) thereby permitting the use of surface mount techniques.
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