摘要 |
First and second high-resistivity compound semiconductor channel layers are formed between an undoped compound semiconductor layer and a doped compound semiconductor layer having an electron affinity smaller than the undoped compound semiconductor layer. The first high-resistivity compound semiconductor channel layer is adjacent to the doped compound semiconductor layer, and has an electron affinity distribution that increases toward the undoped compound semiconductor layer. The second high-resistivity compound semiconductor channel layer is located between the first highresistivity compound semiconductor channel layer and the undoped compound semiconductor layer, and has an electron affinity distribution that decreases toward the undoped compound semiconductor layer. A gate electrode and cap layers are formed on the doped compound semiconductor layer. Source and drain electrodes are formed on the respective cap layers.
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