发明名称 |
Digital-to-analog converter test method and apparatus |
摘要 |
A method and apparatus for testing the linearity of a digital-to-analog converter that uses equally-weighted signal sources to convert high-order bits of digital input, and unequally-weighted signal sources to convert low-order bits. Minimum and maximum digital inputs are supplied, and a linear input-output characteristic is calculated from the two resulting analog output values. The nonlinearity error is calculated by finding the deviations from this linear input-output characteristic of two sets of analog output values: one set obtained by varying the high-order bits while holding the low-order bits constant; the other set obtained by varying the low-order bits while holding the high-order bits constant.
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申请公布号 |
US5631649(A) |
申请公布日期 |
1997.05.20 |
申请号 |
US19960660873 |
申请日期 |
1996.06.10 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
NAKAMURA, YASUYUKI |
分类号 |
H03M1/10;H03M1/74;(IPC1-7):H03M1/10 |
主分类号 |
H03M1/10 |
代理机构 |
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