TRANSISTOR DE PUISSANCE ET PROCEDE DE REALISATION.

摘要

Power transistor comprising on an insulating layer (3), a layer (7) of a semiconductor material containing several N+, N and N+ doped zones. <??>The N doped zone corresponds to the gate zone. <??>The N+ zones correspond to the drain and source zones. <??>The invention relates also to a process for manufacturing such a transistor. <??>Application: manufacture of a field-effect transistor with improved thermal dissipation. <IMAGE>