| 摘要 |
<p>PROBLEM TO BE SOLVED: To shorten error calculation time for establishing synchronization and to efficiently perform a synchronization establishing process. SOLUTION: A transmission data sequence including a frame synchronization code, an information code sequence and a CRC inspection code is inputted from an input terminal 201 and a synchronization code detector 205 detects a synchronization code candidate equal to the frame synchronization code. A CRC calculator 202 calculates the CRC of the transmission data sequence, the CRC calculator 203 calcuates the CRC of a (1, 0, 0,...) sequence inputted to the input terminal 204 and a memory 207 stores calculated results in the middle for the respective synchronization codes and corresponding frame end points. Every time the following synchronization code candidate is detected, the calculated results in the middle of the respective CRC calculators 202 and 203 are stored in the memories 208 and 209, the CRC calculators 202 and 203 are initialized and the CRC calculated results in the middle for the respective synchronization codes are updated by a multiplier 213 and an adder 214.</p> |
