发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To suppress hump phenomenon and parasitic effect of current with a semiconductor element by, after flattening an element isolation oxide film of a trench, etching the element separation oxide film by a specified thickness, and by selectively performing side wall ion implantation process on the area affecting the operation of a parasitic transistor. SOLUTION: A pad oxide film a nitride film are vapor deposited on an Si substrate 11, and, with a nitride film pattern 15 patterned for limitation to an active area and a non-active area and a pad oxide film pattern 13 as a mask, the Si substrate 11 of the non-active area is selectively etched in anisotropic manner, for a trench 17 to be formed. An oxide film is grown all over the trench 17, to prevent damage. The trench 17 is buried in an insulation film, thus an element isolation oxide film 27 is formed. The element separation film 27 is etched in anisotropic manner by specified thickness, and with the nitride film pattern 15 as a mask, ion implantation is performed on the side surface of the trench 17. After the nitride film pattern 15 is removed. The ion implantation for well formation and threshold voltage regulation is performed, thus a gate electrode 19 is formed.</p>
申请公布号 JPH09129721(A) 申请公布日期 1997.05.16
申请号 JP19960178117 申请日期 1996.07.08
申请人 SAMSUNG ELECTRON CO LTD 发明人 RI KOUJIYUN
分类号 H01L21/302;H01L21/3065;H01L21/336;H01L21/76;H01L21/762;H01L21/763;H01L29/78;(IPC1-7):H01L21/76;H01L21/306 主分类号 H01L21/302
代理机构 代理人
主权项
地址