发明名称 LOGICAL REGULATING CIRCUIT AND ELECTRONIC EQUIPMENT WITH THE CIRCUIT
摘要 PROBLEM TO BE SOLVED: To realize a logical regulating circuit with a wide control range and capable of controlling even in a quartz oscillator having large shift in oscillation frequency without increasing the terminal number for ICs. SOLUTION: An oscillation means 1 with an origin oscillator of quartz and the like outputs reference clock and a frequency dividing means 2 divides the frequency of the reference clock into half in turn. A logical regulating data setting means 3 sets logical rating data to compensate the shift of the oscillation frequency of the oscillator with a logical circuit. A logical regulating means 4 controls the state of the frequency dividing means 2 at every specified frequency based on the set logical regulating data and controls the period of the frequency output signal of the frequency dividing means 2 so as to coincide with the desired period. A logical regulating shift means 5 shifts the logical regulating range to adjust to the oscillation frequency characteristics of the oscillator when it is impossible to adjust the period of the frequency dividing output signal to the desired period based on the set logical regulating data. With this logical regulating shift means 5, oscillation frequency can be adjusted using the logical regulating even for a quartz oscillator group having large scatter which has been conventionally difficult to adjust and poor yield.
申请公布号 JPH09127272(A) 申请公布日期 1997.05.16
申请号 JP19950282159 申请日期 1995.10.30
申请人 SEIKO INSTR INC 发明人 KATO KAZUO
分类号 G04G3/00;G04G3/02;H03K23/66;H03L7/00 主分类号 G04G3/00
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