| 摘要 |
A flip-flop circuit able to commute in correspondence with any logic transition of the input signal (IN) using a flip-flop (N1, N2, N3, N4, INV) and a logic gate (E) of the EXNOR type receiving at its input a signal (IN) and the inverted output of the flip-flop (N1, N2, N3, N4, INV). To the output of the EXNOR gate (E) is connected a set-reset flip-flop (FFSR) which allows a reset to be effected after each commutation of the circuit in order to prepare it for the next transition. <IMAGE> |
