发明名称 Self-biased phase-locked loop
摘要 According to the preferred embodiment, a self-biased phase-locked loop is provided that overcomes the limitations of the prior art bias methods and apparatus. In general, a self-biased current controlled semiconductor device, typically a current controlled oscillator, is self biased by the use of a first feedback path, typically provided by a phase-locked loop, where the feedback path provides a control current for controlling the current controlled device. A second feedback path, typically a pair current mirrors, serves as a bias loop having unity gain. The bias loop provides a bias current that is responsive to the control current. This device has the advantage of being self biasing, thus no other biasing circuitry is required.
申请公布号 US5629650(A) 申请公布日期 1997.05.13
申请号 US19960593755 申请日期 1996.01.29
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GERSBACH, JOHN E.;HAYASHI, MASAYUKI;MASENAS, CHARLES J.
分类号 H03L7/089;H03L7/099;(IPC1-7):H03L7/085 主分类号 H03L7/089
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