发明名称 |
Method for reducing distortion effects on DC off-set voltage and symbol clock tracking in a demodulator |
摘要 |
A method for reducing the effects of transients on the DC off-set tracking stage and the symbol timing recovery stage in a full duplex or half duplex packet switched data communication system-in which transients occur in the receiver portion of the subscriber when the transmitter portion of a subscriber is keyed ON and OFF is described. The method is dynamically implemented such the DC tracking stage and the symbol timing recovery stage are set in a first "distortion ready" mode during the time that the transmitter is keyed on and off and is set back to a second "normal" mode after the transmission event is over. In the "distortion ready" mode, the symbol timing recovery stage is set in a "freeze" state such that it makes no further timing adjustments to a decision clock that it generates and the DC off-set recovery stage is set to a narrow bandwidth mode such that it does not track large variations in the DC off-set and amplitude in the received signal. As a result, the Tx/on and Tx/off transients do not upset the decision clock synchronization with the forward channel data stream and the DC off-set tracking stage remains stable.
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申请公布号 |
US5629960(A) |
申请公布日期 |
1997.05.13 |
申请号 |
US19950450947 |
申请日期 |
1995.05.22 |
申请人 |
SIERRA WIRELESS, INC. |
发明人 |
DUTKIEWICZ, MAREK K.;HOUGHTON, PHILIP J. |
分类号 |
H04L5/16;H04B1/16;H04L7/04;H04L25/06;(IPC1-7):H03D1/06;H04B1/12 |
主分类号 |
H04L5/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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