In-circuit-emulation event management system

摘要

A microprocessor system utilizing an in-circuit emulator (ICE) to aid in testing and debugging by an external emulator. The microprocessor operates in two modes. One mode is emulation mode in which the microprocessor outputs trace information for allowing the emulator to reconstruct microprocessor execution, and the other mode is interrogation mode where the microprocessor ceases emulation mode, and allows the emulator to modify the state of the microprocessor or interrogate it. An +E,ovs ICEBRK+EE signal is provided on the microprocessor to better handle transition from emulation to interrogation mode. An address mark counter and generator is provided to force the microprocessor to automatically issue an address mark message which includes the location of the microprocessor's instruction pointer. An AMCTRL bit may be further provided to allow a human user to selectively inhibit the issuance of an address mark. An +E,ovs ICELOCK+EE signal is provided on the microprocessor to control the writing of control registers during hardware and software initialization that the microprocessor performs. A +E,ovs MSGFRM+EE signal is provided to aid the emulator in capturing trace information generated at high frequencies (in excess of 40 MHz).