发明名称 Single feature size MOS technology power device
摘要 A MOS technology power device comprises: a semiconductor material layer (2) of a first conductivity type; a conductive insulated gate layer (7,8,9) covering the semiconductor material layer (2); a plurality of elementary functional units, each elementary functional unit comprising a body region (3) of a second conductivity type formed in the semiconductor material layer (2), the body region (3) having the form of an elongated body stripe, each elementary functional unit further comprising an elongated window (12) in the insulated gate layer (7,8,9) extending above the elongated body stripe (3). Each body stripe (3) includes at least one source portion (60;61;62) doped with dopants of the first conductivity type, intercalated with a body portion (40;41;3') of the body stripe (3) wherein no dopant of the first conductivity type are provided. The conductive insulated gate layer (7,8,9) comprises a first insulating material layer (7) placed above the semiconductor material layer (2), a conductive material layer (8) placed above the first insulating material layer (7), and a second insulating material layer (9) placed above the conductive material layer (8). Insulating material sidewall spacers (13) are provided to seal edges of the elongated window (12) in the insulated gate layer (7,8,9). <IMAGE> <IMAGE> <IMAGE>
申请公布号 EP0772242(A1) 申请公布日期 1997.05.07
申请号 EP19950830454 申请日期 1995.10.30
申请人 CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO - CORIMME 发明人 FRISINA, FERRUCCIO;MAGRI', ANGELO;FERLA, GIUSEPPE
分类号 H01L29/74;H01L21/331;H01L29/06;H01L29/08;H01L29/10;H01L29/749;H01L29/78 主分类号 H01L29/74
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