发明名称 SEMICONDUCTOR PACKAGE SUBSTRATE AND MANUFACTURE THEREOF
摘要 PROBLEM TO BE SOLVED: To improve the alignment of bonding fingers in all stages. SOLUTION: On a substrate 20 having a chip mount 4 in a central part are stacked a plurality of substrates 2 having inner circuit patterns 1 arranged to surround the chip mount 4 and having their inner edges cut to expose connecting parts 1a in such a manner that tiers of cut edges are formed with the chip mount at the bottom. When bonding fingers for connecting the inner circuit patterns 1 are formed on the tiers, slant circuit patterns are used to connect the bonding fingers with the inner circuit patterns 1 that deviate in position.
申请公布号 JPH09121001(A) 申请公布日期 1997.05.06
申请号 JP19950276052 申请日期 1995.10.25
申请人 MATSUSHITA ELECTRIC WORKS LTD 发明人 OKAMOTO TAKESHI;YOSHIDA TOKUO
分类号 H01L23/12;(IPC1-7):H01L23/12 主分类号 H01L23/12
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