发明名称 Power saving method and apparatus for changing the frequency of a clock in response to a start signal
摘要 At least two circuit elements are interconnected by a bus which permits transmission of information between the circuit elements. A clock signal generator generates a clock signal alternately of at least two frequencies, namely, a low frequency and a high frequency. When information is not transmitted upon the bus, the clock signal generator generates the clock signal of the low frequency, and the circuit is operated at the low frequency level. When information is generated upon the bus, the clock signal generator generates a clock signal of the high frequency and the circuit is operated at the high frequency. Detection of a start bit, for example, forming a first bit of a word transmitted upon the bus, once detected, causes the clock signal generator to generate the clock signal of the increased frequency. Because the power consumption of an electrical circuit is proportional to the frequency at which the circuit is operated, the circuit is operated at minimal power levels except during times in which information is transmitted.
申请公布号 US5628001(A) 申请公布日期 1997.05.06
申请号 US19950529766 申请日期 1995.09.18
申请人 MOTOROLA, INC. 发明人 CEPURAN, LAWRENCE D.
分类号 H04B1/44;G06F1/04;G06F1/12;G06F1/32;H04B1/40;H04B7/26;(IPC1-7):G06F1/04;G06F1/08 主分类号 H04B1/44
代理机构 代理人
主权项
地址