发明名称 |
Data processing apparatus handling plural divided interruption |
摘要 |
The object of the present invention is to provide an interruption processing apparatus which allows for improvements in operational speed and offers flexibility for a variety of systems, while using a lower amount of hardware. When an interruption occurs, then for the present invention shown in FIG. 2 , the corresponding interruption request flag in the interruption control register 1 in the group interruption control unit 5 is set. The interruption request unit 2 then outputs the interruption signal to the CPU 6 based on the interruption request flag. The interruption level arbitration unit 3 adjusts any conflict with other group control units and outputs, as the arbitration result, a signal showing whether output is possible or not for the interruption signal. The group number output unit 4 then outputs the fixed group number for the group in accordance with the arbitration result in response to access from the CPU 6. Once the CPU 6 receives the interruption request signal, no matter from what group interruption control unit the interruption was from, it activates the start of a program starting at the same address.
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申请公布号 |
US5628018(A) |
申请公布日期 |
1997.05.06 |
申请号 |
US19940333747 |
申请日期 |
1994.11.03 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
MATSUZAKI, TOSHIMICHI;HIGAKI, NOBUO |
分类号 |
G06F9/48;G06F13/24;G06F13/26;(IPC1-7):G06F13/26 |
主分类号 |
G06F9/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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