发明名称 Deep trench dram process on SOI for low leakage DRAM cell
摘要 A deep trench DRAM cell is formed on a silicon on isolator (SOI) substrate, with a buried strap formed by outdiffusion of dopant in associated trench node material, for providing an electrical connection between the trench node and the active area of a MOS transfer gate formed in the substrate adjacent the trench in an uppermost portion of the substrate.
申请公布号 US5627092(A) 申请公布日期 1997.05.06
申请号 US19940313507 申请日期 1994.09.26
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 ALSMEIER, JOHANN;STENGL, REINHARD J.
分类号 H01L21/8242;H01L27/108;H01L27/12;H01L29/786;(IPC1-7):H01L21/70;H01L27/00 主分类号 H01L21/8242
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