| 摘要 |
PROBLEM TO BE SOLVED: To reduce the mounting area by connecting the electrode of an active component mounted on the major plane of a multilayer interconnection board with the interconnection of the multilayer interconnection board with wire and fixing the major plane of the multilayer interconnection board by covering it with a cap and providing a plurality of electrode terminals of the multilayer interconnection at the rear plane. SOLUTION: On the major plane of a multilayer interconnection board 2, a semiconductor chip 45, being an active component, and a Zener diode 50, capacitor 53, etc., being passive components, are mounted. Then, the electrode of the semiconductor chip 45 is connected with first layer interconnection 30 by conductive wire 46. In such conditions, a cap 4 is fixed by permitting the cap to cover the major plane of the multilayer interconnection board 2 through solder 3, and a plurality of electrode terminals are provided at the rear plane of the multilayer interconnection board 2. Thus, the size of the interconnection board is reduced and the size of the package is reduced. As a result, mounting area can be reduced.
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