| 摘要 |
<p>A data communication receiver includes conventional means for receiving and demodulating a synchronous pulse amplitude modulated signal to provide baseband I and Q signals. A pair of absolute value generators process the baseband I and Q signals to provide absolute value I and Q signals which are combined to form a combined I and Q signal. The combined I and Q signal is applied to a third absolute value generator, the output of which is filtered by a baud rate or higher rate with a low order filter to produce a recovered clock signal.</p> |
