SEMICONDUCTOR NON-VOLATILE MEMORY DEVICE HAVING A NAND CELL STRUCTURE
摘要
A NAND stack array (95') is placed within a well formed on a semiconductor substrate and includes a series array of memory cell transistors (10) whose threshold voltages can be electrically altered over a range of depletion values. When a cell within a certain NAND stack is selected for a read operation, a peripheral circuit drives the selected gate word line to the well potential and drives the word lines of the other gates within the selected NAND stack to a potential at least equal in magnitude to the magnitude of a reference voltage plus the threshold voltage of a memory cell in the programmed state.
申请公布号
WO9715929(A1)
申请公布日期
1997.05.01
申请号
WO1996US17130
申请日期
1996.10.24
申请人
NVX CORPORATION;LANCASTER, LOREN, T.;HIROSE, RYAN, T.