发明名称 ADAPTABLE BIT CIRCUIT FOR ACCUMULATED DATA
摘要 An adaptive bit assigning circuit using accumulated data porducing state is disclosed. The circuit comprises: a subband analysis filter(10) for analyzing an input audio signal(a); an acoustic model unit(20) for analyzing the frequency of the input audio signal(a) and determining a first quantization rate of a subband analysis result(b) based on a human hearing characteristics; a quantization unit(30) for adaptively quantizing the subband signal(b) to produce a subband signal(f) which is compressed by a unit of frame; a frame formatter(40) for adding the subband signal(f) and other control signal to make a bit stream(g); a channel buffer(50) for producing a fixed transmission rate of the transmitting bit stream(i) by using a FIFO memory and accumulating data relevant to the previous frames of the audio signal to produce a current channel state information; and a estimator for estimating a data producing size of the current frame to produce a second quantization signal(d) and a quantization control signal(e) of the quantization unit(30). Thereby, the apparatus adaptively controls the quantity of the current frame data using the previous frame data quantity, it is possible to enhance the quality of a audio signal.
申请公布号 KR970006630(B1) 申请公布日期 1997.04.29
申请号 KR19920027193 申请日期 1992.12.31
申请人 HYUNDAI ELECTRONICS IND.CO.,LTD 发明人 KANG, CHOL-SUK
分类号 H03M7/30;(IPC1-7):H03M7/30 主分类号 H03M7/30
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