摘要 |
A highly sensitive comparator circuit including a condenser comparatar circuit 10, internal output buffer 20 and latch circuit 40 is constructed in such a manner that a switch SW3 is configured of an N-channel MOS transistor M11 and P-channel MOS transistor M12 between the condenser comparator circuit 10 and internal output buffer 30, an amplification stage A1 is configured of a P-channel MOS transistor M5, N-channel MOS transistor M6 and condenser C2, and an amplification stage A2 configured of N-channel MOS transistors M8 and M13 and P-channel MOS transistor M7, the amplification stages A1 and A2 constructing one amplification part 20.
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