发明名称 |
Non-integral delay circuit |
摘要 |
A time-discrete signal is delayed by a selectable fraction ( delta ) of a sampling period of the time-discrete signal. First (F1) and second (F2) differential signals having mutually different phase characteristics are derived from the time-discrete signal and are subsequently combined (MIX) dependent upon the selectable fraction ( delta ) to obtain a phase-adjusted correction signal. The product of the selectable fraction ( delta ) and the correction signal is added to the time-discrete signal to obtain a time-discrete signal which has been delayed by the selectable fraction ( delta ). The second differential signal is obtained by means of a differentiator with asymmetric coefficients in order to optimise the transfer characteristic for delta =0.5.
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申请公布号 |
US5625581(A) |
申请公布日期 |
1997.04.29 |
申请号 |
US19940340570 |
申请日期 |
1994.11.16 |
申请人 |
U.S. PHILIPS CORPORATION |
发明人 |
NILLESEN, ANTONIUS H. H. J. |
分类号 |
H04N5/21;H03H11/26;H03H17/00;H03H17/08;H04N7/01;(IPC1-7):G06F17/10 |
主分类号 |
H04N5/21 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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