发明名称 High pressure reoxidation anneal of silicon nitride for reduced thermal budget silicon processing
摘要 A semiconductor integrated circuit fabrication method is provided for forming a capacitor on a semiconductor integrated circuit substrate. A lower capacitor electrode is formed over the semiconductor integrated circuit substrate and a capacitor dielectric is formed over the lower capacitor electrode. The capacitor dielectric is preferably formed of silicon nitride. A reoxidation anneal of the capacitor dielectric is performed at a pressure greater than one atmosphere in order to form an oxide layer over the capacitor dielectric. An upper capacitor electrode is disposed over the oxide layer to form a capacitor. The capacitor is formed as part of a dynamic random access memory cell. A transistor is formed upon the semiconductor integrated circuit substrate and the lower capacitor electrode is formed in electrical contact with a diffusion region of the transistor. The capacitor is formed within an opening in molding material that is deposited over the surface of the semiconductor integrated circuit substrate. The reoxidization anneal of the capacitor dielectric is performed at a temperature in the range of 600 DEG C. to 800 DEG C. at pressures ranging up to twenty-five atmospheres. This forms an oxide layer having a thickness between five angstroms and fifteen angstroms in a period of time short enough to prevent excessive out diffusion of dopants from the diffusion regions of the transistor.
申请公布号 US5624865(A) 申请公布日期 1997.04.29
申请号 US19950542979 申请日期 1995.10.13
申请人 MICRON TECHNOLOGY, INC. 发明人 SCHUEGRAF, KLAUS F.;THAKUR, RANDHIR P. S.;FAZAN, PIERRE C.
分类号 H01L21/02;H01L21/8242;(IPC1-7):H01L21/70;H01L27/00 主分类号 H01L21/02
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