发明名称 MEMORY BUS TERMINATION MODULE
摘要 <p>A memory bus termination module is described for reducing overshoot and undershoot in a communication bus. The module includes circuitry which reduces or eliminates unwanted signal fluctuations. The module can be placed in a personal computer memory bus to allow the computer purchaser to expand memory capabilities, and in particular install high data rate memories. These memories include burst access memories which operate at or above 66 MHz. Two clamping diodes are provided in the termination circuitry and connected to communication lines of the bus.</p>
申请公布号 WO1997015012(A1) 申请公布日期 1997.04.24
申请号 US1996016708 申请日期 1996.10.17
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址