DIGITAL MATCHED FILTER FOR DIRECT SPECTRUM SPREAD

摘要

PROBLEM TO BE SOLVED: To reduce the circuit scale and to simplify the circuit constitution by substituting a multiplier with a polarity inverter and a selection circuit. SOLUTION: The serial input signal subjected to A/D conversion after reception is inputted to a shift register 1. The input signal is successively shifted right synchronously with its bit period or a sampling period. Polarity inverters 7 to 12 connected to respective shift register don't invert only sign bits but invert the polarity of the input signal from the positive to the negative or from the negative to the positive. Selection circuits 13 to 18 take outputs of polarity inverters 7 to 12 as one side inputs and take outputs of shift registers 1 to 6 as the other inputs and select whether polarity inverted signals or signals themselves should be outputted in accordance with the tap coefficient from a tap coefficient generator 20. Signals whose polarities are determined are inputted to an adder 19 and are added. Thus, the multiplier extending the circuit scale is unnecessary.