| 摘要 |
PROBLEM TO BE SOLVED: To normally perform the digital processing of a video signal even in the case of unstable synchronization of a video signal source. SOLUTION: The video signal is inputted to a delay circuit 1 and a synchronizing signal separation circuit 2. In the delay circuit, the input video signal is sampled in an A/D conversion part 11 by the clock from an oscillator 11 and is digitally converted and is written in a memory 12 and is read out after the delay of a required time by the clock and is analogically converted by a D/A conversion part 13 and is inputted to a digital processing circuit 4 with the delay of 1H. A signal HD separated by the synchronizing signal separation circuit is applied to a PLL circuit 3, and the clock digitally oscillated by a VCO 17 has the frequency divided to the frequency of the signal HD by a frequency divider 18 and is fed back to a phase comparator 15 and has the phase compared with that of the signal HD, and an unnecessary frequency component of the signal outputted in accordance with the phase difference is eliminated by an LPF 16, and this signal is applied to the VCO 17 to generate a clock whose phase coincides with that of the signal HD of 1H before, and this clock is used for processing in the digital processing circuit 4. |
