发明名称 CIRCUIT SIMULATION METHOD FOR SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To facilitate the Tox dependency analyzation of a circuit characteristic by providing gate insulated film thickness (Tox) dependency to each model without damaging the features of various models VTH beginning from BSIM 1 to 3. SOLUTION: An expression is used as the model VTH. This expression provides Tox dependency to each item of K1 , K2 andηin the expression without damaging the basic feature of BSIM 1 at all. K1 ', K2 ' andη' in the expression are constant parameters equivalent to K1 /Tox, K2 /Tox,η/Kox, respectively.
申请公布号 JPH09106416(A) 申请公布日期 1997.04.22
申请号 JP19950287969 申请日期 1995.10.09
申请人 RICOH CO LTD 发明人 TANIGAWA TETSUO
分类号 H01L29/78;G06F17/50;(IPC1-7):G06F17/50 主分类号 H01L29/78
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