| 摘要 |
PROBLEM TO BE SOLVED: To integrate a micro-electronic system with high yield by using CMOS adaptive standard semiconductor technique by joining a first substrate, to which a via hole is formed, with a second substrate, deepening the via hole and connecting the metallizings of both substrates. SOLUTION: A first substrate 1 containing a first layer 3 having circuit structure and a first metallizing plane having a metallizing 5 within the range of a first main surface is prepared, a via hole 7 is bored within the range of the first main surface, and the via hole is penetrated to the whole of the first layer 3. A second substrate 8 comprising a second layer 10 having circuit structure and a second metallizing plane having the metallizing 11 within the range of a second main surface is prepared, and the first substrate 1 and the second substrate 8 are joined and a substrate stack is formed. The substrate stack is thinned until the via hole 7 is bored on the side of the first substrate 1, the via hole 7 is deepened up to the metallizing 11, and an electric conductive junction is realized through the via hole 7 between the metallizings 5, 11. |
