| 摘要 |
The present invention provides a method and apparatus for achieving m-bitxm-bit multiplication in two states with a minimum amount of hardware. The invention multiplies an m-bit multiplicand A by an m-bit multiplier B to produce a 2m-bit final product AxB. The multiplicand A has a most significant m/2 bits denoted by AH and a least significant m/2 bits denoted by AL. The multiplier B has a most significant m/2 bits denoted by BH and a least significant m/2 bits denoted by BL. By adding the least significant m/2 bits of BHxAL to the middle m/2 bits of the product BL xA, the invention produces a number having a least significant m bits that are the least significant m bits of the final product during a first pass. The most significant m bits of the final product are produced during a second pass. Using this technique, the invention produces the final product in two states with substantially less hardware than current systems.
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