发明名称 COPLANAR THIN-FILM TRANSISTOR AND PREPARATION THEREOF
摘要 PROBLEM TO BE SOLVED: To prevent generation of a leak caused by a silicide layer and to prevent reduction in TFT characteristics while preventing increase in the number of steps of eliminating the leak, by forming the silicide layer on source and drain regions. SOLUTION: A gate insulating film 5 is subjected to a dry etching process under specific conditions by use of a gate electrode 6 as a mask to be left in its an area located under the gate electrode 6 and to be removed in the other areas. Thereafter, a semiconductor layer 4 is ion implanted by an ion doping apparatus by use of the gate electrode 6 as a mask to form source and drain regions 7 and 8 in the semiconductor layer 4. The source and drain regions are then subjected to a sputtering process by use of Mo all thereover to form an 100Å-thick Mo film deposited thereon, and then subjected to a wet etching process with an Mo etchant of phosphoric acid and acetic acid to thereby form an Mo silicide layer 9 on the source and drain regions 7 and 8 of the semiconductor layer 4. Thereby the silicide layer 9 is formed self- aligned on the source and drain regions 7 and 8 of the semiconductor layer 4, thus reducing its contact resistance.
申请公布号 JPH09107105(A) 申请公布日期 1997.04.22
申请号 JP19950264183 申请日期 1995.10.12
申请人 SHARP CORP 发明人 NAKADA YUKIHIKO;YOSHINOUCHI ATSUSHI;MURATA YASUAKI
分类号 H01L21/28;H01L29/786;(IPC1-7):H01L29/786 主分类号 H01L21/28
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