发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To surely set a test mode by inputting a power source commonly used for an internal circuit and an input buffer, and then imparting a fixed sequence to an output buffer power source to establish a test mode. SOLUTION: In setting of a test mode, an internal cell and input buffer power source is inputted to fix a terminal T1 to a logic H, and a voltage is applied to an output buffer power source so that the logic of a terminal T2 is fixed to H through H→L→H→L. When such a voltage sequence is imparted to the terminal T2, and data input A of a combinational circuit 5 becomes H at a point of time of the initial voltage fall by the operation of sequential circuits 3, 4 using D-FF, and the data input B becomes H at a point of time of the following voltage fall. At this point of time, a test mode set signal TM which is the output of the circuit 5 becomes H, and a circuit 11 to be tested is set to the test mode. Thus, the test mode can be surely set with a simple circuit structure.
申请公布号 JPH09105771(A) 申请公布日期 1997.04.22
申请号 JP19950263203 申请日期 1995.10.11
申请人 KAWASAKI STEEL CORP 发明人 SATO TAKAHARU
分类号 G01R31/28;G01R31/3185;(IPC1-7):G01R31/318 主分类号 G01R31/28
代理机构 代理人
主权项
地址