发明名称 Scalable EPROM array with thick and thin non-field oxide gate insulators
摘要 An electrically programmable read-only memory (EPROM) array having self-aligned thick oxide isolation units, and a method for manufacturing the EPROM array are disclosed. The EPROM array is formed of EPROM areas having EPROM cells and control areas, two per EPROM area. Each control area includes at least one row and each row includes a first polysilicon strip, a second polysilicon strip lying on top of and perpendicular to the first polysilicon strip, and alternating thick and thin oxide elements under the first polysilicon strip. The thick and thin oxide elements are self-aligned to the first polysilicon strip. The thin oxide and the first and second polysilicon strips form a select transistor. The thick oxide and the first and second polysilicon strips form a novel self-aligned thick oxide isolation unit.
申请公布号 US5623443(A) 申请公布日期 1997.04.22
申请号 US19940212165 申请日期 1994.03.11
申请人 WAFERSCALE INTEGRATION, INC. 发明人 KAZEROUNIAN, REZA;IRANI, RUSTOM F.;EITAN, BOAZ
分类号 G11C16/04;H01L21/8247;H01L27/115;(IPC1-7):G11C16/06 主分类号 G11C16/04
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