SEMICONDUCTOR DEVICE HAVING POWER LINE STRUCTURE FOR POWER NOISE REDUCTION

摘要

A semiconductor chip having a power voltage line and ground voltage line includes a quiet power line to which a quiet voltage having a potential ranging between the power voltage and ground voltage is supplied, the quiet power line being arranged between the power voltage line and ground voltage line, and a coupler connected between the quiet power line and power voltage line and between the ground voltage line and quiet power line. A memory array of a memory device formed on the semiconductor chip 1 is divided into four memory banks MA1 to MA4. The remaining region in the semiconductor chip 1 includes address inputting and decoding circuits for storing information in the memory cell inside the memory banks and reading it out and circuits for sensing, transmitting and inputting data. The power voltage line Vcc extended from a power voltage pad 3 and ground voltage line Vss extended from a ground voltage pad 5 are arranged along the edge of the semiconductor chip and supply power to peripheral circuits and memory banks. The quiet power line Vint connected to the output port of a quiet power generator formed on the semiconductor chip is arranged between the power voltage line and ground voltage line.