SOI-MOS transistor structure

摘要

The transistor has a pair of n+ source/drain regions (3a,3b,3c) and a p+ channel potential fixing region (4a,4b). An active region (5) is sub-divided by first, second, third and fifth wires (1,2,14,15). When holes stored in an effective channel region (11) flow into the channel potential fixing region the substrate suspension effect can then be prevented. When the width of one region of the pair of source/drain regions is wider than the other region the contact resistance can be reduced.