发明名称 |
A SYSTEM AND METHOD FOR INCREASING FUNCTIONALITY ON THE PERIPHERAL COMPONENT INTERCONNECT BUS |
摘要 |
An apparatus and method for enabling a Peripheral Component Interconnect ("PCI") bus (220) to support direct memory access ("DMA") tranfers (230a). The apparatus comprises a plurality of DMA controllers (230a-230n), a state machine (360) and an internal storage element (340). The plurality of DMA controllers (230a-230n) transfers DMA requests for an electronic device to the state machine (360) and DMA acknowledges from the state machine (360) to the electronic device. The state machine (360) controls the DMA transfer by performing two transactions for each DMA transfer: namely, a memory cycle and an input/output cycle. The internal storage element (340) acts as a buffer for this multiple cycle DMA transfer.
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申请公布号 |
WO9714100(A1) |
申请公布日期 |
1997.04.17 |
申请号 |
WO1996US14939 |
申请日期 |
1996.09.18 |
申请人 |
INTEL CORPORATION;NAGARAJ, RAVI;KUNDU, ANIRUDDHA;AKIYAMA, JAMES |
发明人 |
NAGARAJ, RAVI;KUNDU, ANIRUDDHA;AKIYAMA, JAMES |
分类号 |
G06F13/42;(IPC1-7):G06F13/00 |
主分类号 |
G06F13/42 |
代理机构 |
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