发明名称 Output pad circuit for detecting short faults in integrated circuits
摘要 Provided with an integrated circuit are plural output pad circuits being connected to wires by way of an output pin. Each output pad circuit comprises an input section for taking in an external test signal; a generator, connected to an output of the input section, for generating a signal whose logic value is the same as the logic value of a signal from the input section; a controller for controlling the generator; and a measurement section for measuring the logic value of a signal from the generator. The controller controls the generator in order that a logic 1 signal and a logic 0 signal generated by the generator have different electric current levels in the test operation mode. If there occurs a short between a wire being connected to an output pad circuit that receives a logic 1 signal and a wire being connected to an output pad circuit that receives a logic 0 signal, then signals from these output pad circuits will have the logic value of one of the logic 1 signal and the logic 0 signal that has a higher electric current level than the other. On the other hand, in the normal operation mode, the generator generates both a logic 1 signal and a logic 0 signal at the same electric current level so as to balance the electric current level.
申请公布号 US5621740(A) 申请公布日期 1997.04.15
申请号 US19940242673 申请日期 1994.05.13
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 KAMADA, TAKEHIRO
分类号 G01R31/3185;(IPC1-7):G01R31/28 主分类号 G01R31/3185
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