发明名称 Nonvolatile memory blocking architecture and redundancy
摘要 A nonvolatile memory includes a global line. A plurality of memory blocks and a redundant block are also included in the memory, each block having a plurality of local lines and a decoder for selectively connecting the global line to one of the local lines when the decoder is enabled and for isolating the local lines from the global line when the decoder is disabled. When one of the plurality of blocks is found to be a defective block, the defective block is replaced by the redundant block. Circuitry is provided for disabling the decoder of the defective block and enabling the decoder of the redundant block whenever the defective block is addressed.
申请公布号 US5621690(A) 申请公布日期 1997.04.15
申请号 US19950430344 申请日期 1995.04.28
申请人 INTEL CORPORATION 发明人 JUNGROTH, OWEN W.;WINSTON, MARK D.
分类号 G11C8/12;G11C16/08;G11C29/00;(IPC1-7):G11C7/00 主分类号 G11C8/12
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