发明名称 Method and apparatus for providing efficient software debugging
摘要 A method and apparatus for the separate enablement of debug events during the execution of operating system routines and non-operating system routines. According to one aspect of the invention, a processor is described which may operate in a first mode and a second mode. While operating in the first mode, the processor allows for access to additional resources which are not available in the second mode. The processor generally includes a first storage area, a circuit, and debug circuitry. The first storage area has stored therein a first indication. This first indication indicates which mode the processor is currently operating in. The circuit has stored therein a second indication and a third indication. The second indication indicates whether a debug event is to be recognized while the processor is operating in the first mode. The third indication indicates whether the debug event is to be recognized while the processor is operating in the second mode. The debug circuitry is coupled to the first storage area to receive the first indication. The debug circuitry is also coupled to the circuit to receive either the second indication or the third indication based on the state of the first indication. The debug circuitry allows for the recognition of the debug event based on the state of the indication it receives from the circuit.
申请公布号 US5621886(A) 申请公布日期 1997.04.15
申请号 US19950492293 申请日期 1995.06.19
申请人 INTEL CORPORATION 发明人 ALPERT, DONALD;HAMMOND, GARY
分类号 G06F11/36;(IPC1-7):G06F11/00 主分类号 G06F11/36
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