ANALOG-TO-DIGITAL CONVERTER

摘要

The present invention discloses an improved analog-to-digital converter. A second sampling circuit samples the voltage difference between an analog signal and a reference voltage, before a first sampling circuit moves to a follow operation from a sample operation. Owing to pipelining by the first and second sampling circuits, even after the first sampling circuit moves to a follow operation, the difference between an analog signal and a reference voltage is still applied to a logical-level amplifier. The output of the logical-level amplifier, amplified to a logical voltage, is converted by a logic device into an A/D conversion output. Therefore, ADC differential non linearity error can be reduced.