| 摘要 |
A non-volatile memory array includes a plurality of memory cells. Each of the memory cells stores two-bits of data therein and has a threshold voltage corresponding to the data bits stored therein. A voltage providing unit provides a first test voltage to an addressed one of the memory cells. A sensing unit senses whether the addressed one of the memory cells is in a conducting state after the first test voltage has been applied thereto to determine a first bit of data stored therein. When the first bit of data stored in the addressed one of the memory cells is 0, the voltage providing unit provides a second test voltage and the sensing unit senses whether the addressed one of the memory cells is in the conducting state after the second test voltage has been applied thereto to determine a second bit of data stored therein. Otherwise, the voltage providing unit provides a third test voltage and the sensing unit senses whether the addressed one of the memory cells is in the conducting state after the third test voltage has been applied thereto to determine a second bit of data stored therein.
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