发明名称 Phase-locked loop, phase comparator for use in the phase-locked loop, and reproducing device including the phase-locked loop
摘要 A phase-locked loop includes an input terminal (1) for receiving a binary signal, a phase comparator (3) having a first input (2) coupled to the input terminal (1), having a second input (4), and having an output (5) coupled to an input (9) of a control-signal-controlled oscillator (10) via a control-signal generator unit (7). An output (11) of the oscillator is coupled to the second input of the phase comparator. The phase comparator derives a first pulse (P1) and a second pulse (P2) in response to a signal transition from a first value to a second value in the binary signal applied to the first input and an oscillation signal applied to the second input, the first pulse having a pulse width which is a measure of the phase difference between the binary signal and the oscillation signal, and the second pulse having a pulse width proportional to +E,fra 1/2+EE .fo, where fo is the frequency of the oscillation signal. The control-signal generator unit (7) derives a control signal from the first pulse and the second pulse and applies the control signal to the oscillator, and the control-signal generator unit derives such a control signal from the first pulse and the second pulse that the phase difference is controlled substantially toward zero.
申请公布号 US5619171(A) 申请公布日期 1997.04.08
申请号 US19950534092 申请日期 1995.09.26
申请人 U.S. PHILIPS CORPORATION 发明人 RIJCKAERT, ALBERT M. A.;VAN VLERKEN, JOHANNES J. L. M.
分类号 H03L7/089;H03L7/08;H03L7/085;H04L7/033;(IPC1-7):H03D13/00 主分类号 H03L7/089
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